W55RP20
Delivery Time: 7 days for quantities in stock. Backordered pieces: 4 weeks
SiP combining the W5500 hardwired TCP/IP controller and the RP2040 dual-core MCU.
Product Description
System-in-Package combining the W5500 hardwired TCP/IP controller and the RP2040 dual-core MCU
The W55RP20 is a System-in-Package (SiP) that integrates WIZnet's W5500 hardwired TCP/IP controller with Raspberry Pi's RP2040 microcontroller in a single 8 × 8 mm 68-pin QFN package. The W5500 provides a complete hardware TCP/IP stack with built-in 10/100 Mbps Ethernet PHY, eliminating external networking ICs and reducing host-MCU networking overhead to a minimum. The RP2040 contributes a dual-core ARM Cortex-M0+ at 133 MHz (up to 200 MHz at 1.15 V), 264 kB on-chip SRAM in six independent banks, 2 MB on-chip flash, and a comprehensive set of peripherals including 2× UART, 2× SPI, 2× I2C, 16× PWM, USB 1.1 host/device controller and 8 PIO state machines. The W55RP20 is the underlying chip of WIZnet S2E modules such as the WIZ-IP20 and W232N.
Feature
- System-in-Package: W5500 hardwired TCP/IP controller and RP2040 MCU in one 68-QFN package (8 × 8 mm)
- Dual-core ARM Cortex-M0+ up to 133 MHz (up to 200 MHz at 1.15 V)
- 264 kB on-chip SRAM in six independent banks
- 2 MB on-chip flash memory
- Hardware TCP/IP stack: TCP, UDP, IPv4, ICMP, ARP, IGMP, PPPoE
- 8 independent hardware sockets, 32 kB internal RX/TX buffer
- 10/100 Mbps Ethernet PHY integrated, supports Auto-Negotiation, Wake-on-LAN and Power Down mode
- Peripherals: 2× UART, 2× SPI, 2× I2C, 16× PWM, USB 1.1 host/device, 8× PIO state machines, 4-channel timer, RTC
- 23 multifunction GPIO pins, 4 of which can be used as analog inputs (12-bit ADC)
- DMA controller and fully-connected AHB crossbar
- On-chip programmable LDO for core voltage generation
- Two on-chip PLLs for USB and core clocks
- 16 kB on-chip Boot ROM with USB mass-storage bootloader
- Operating temperature -40 °C to +85 °C
Related Links
| Manufacturer / Hersteller | WIZnet Korea |
|---|---|
| Dimension | 8 x 8 mm |
| Ethernet I/F | PHY |
| Operating Temperature | -40 °C to +85 °C |
| Operating Voltage | 3.3 V |
| Functions | 4-in-1, MCU + TCP/IP + MAC + PHY |
| Network sockets count | 8 |
| internal DPRAM buffer memory | 32 kB |
| Package | QFN |
| pin count chip | 68 |
| MCU I/F | SPI |
| Ethernet Speed | 10/100 |
| RAM | 264 kB |
| Related Chip/Module | W5500 |
| Protocol | IPv4 |
| Auto Negotiation | Yes |
| Wake on Lan | Yes |
| Power Down Mode | Yes |
| MCU core | ARM Cortex M0+ |
| Core speed | 2x 133 MHz |
| I/O ports | 23 GPIO, 4 of which can be used as analog inputs |
| Timer / Counter | 4 |
| Debug I/F | Yes |
