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W5300
€5.71
€4.80
Delivery Time: 7 days for quantities in stock. Backordered pieces: 4 weeks
3 in 1 Fully Hardwired Highspeed (up to 80 Mbps) Ethernet Controller (TCP/IP, MAC, PHY) with DMA connectivity
Product Description
Fully Hardwired Highspeed TCP/IP Performance
The W5300 chip is a Hardwired TCP/IP embedded Ethernet controller that enables easier internet connection for embedded systems that required high network performance.
W5300 suits users in need of stable internet connectivity best, using a single chip to implement TCP/IP Stack, 10/100 Ethernet MAC and PHY. Hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP and PPPoE which has been proven through various applications over many years. W5300 uses a 128 kBytes internal buffer as its data communication memory.
By using W5300, users can implement the Ethernet application they need by using a simple socket program instead of handling a complex Ethernet Controller. It is possible to use 8 independent hardware sockets simultaneously. Bus (Direct & Indirect) is provided for easy integration with the external MCU. The W5300 supports max. 80Mbps network throughput.
Features
- 100LQFP lead-free package (14x14mm)
- Hardwired TCP/IP protocols : TCP, UDP, ICMP, IPv4, ARP, IGMP, PPPoE
- Un-attackable hardware network engine for preventing network attacks such as flooding, spoofing, injection
- Host Interface : 8/16 bit Data Bus (Direct & Indirect Address Mode)
- High Network Performance : Max 80Mbps (by DMA)
- Supports embedded OS driver : Linux (kernel 2.6.24)
- 8 Independent hardware socket
- Internal 128 kBytes memory for TCP/IP packet processing
- 10BaseT / 100Base TX Ethernet PHY Embedded
- Supports Auto-Negotiation (Full & Half Duplex, 10 & 100 Based)
- Supports Auto-MDIX
Related Links
| Manufacturer / Hersteller | WIZnet Korea |
|---|---|
| Dimension | 14 mm x 14 mm |
| Ethernet I/F | MII, PHY |
| Operating Temperature | -40 °C to +85 °C |
| Operating Voltage | 3.3 V / 5 V |
| Functions | 3-in-1, TCP/IP + MAC + PHY |
| Network sockets count | 8 |
| internal DPRAM buffer memory | 128 kB |
| Package | LQFP |
| pin count chip | 100 |
| MCU I/F | DMA |
| Ethernet Speed | 10/100 |
| Protocol | IPv4 |
| Auto Negotiation | Yes |
| Wake on Lan | No |
| Power Down Mode | No |
| MCU core | ARM Cortex M0 |
| Core speed | 96 MHz |
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